Educational Resources
Disclaimer:
These technical reports are intended solely for educational
purposes. The use of these reports and any reliance you place on
the information contained within them is strictly at your own
risk.
The reports and writings are authored by Prof. Abderazek Ben
Abdallah and/or his students. Neither the authors nor the
affiliated institutions shall be held liable for any direct,
indirect, incidental, or consequential damages arising from the
use of these reports.
Technical Reports and Tutorials
- 3D-Printed
Android: A Tutorial, Part I of III, July 7, 2025
- Maatar-NASH
Quick Start Guidance Tutorial, June 14, 2024
- DN-SoC:
FPGA Implementation of Doanh Neuromorphic System-on-Chip,
September 19, 2023 [source
code] [GitHub]
- AIzuHand
I VR-based Simulated Training, August 8, 2023
- NeuroSys
3D-Printed Prosthetic Hand Control, May 13, 2022
- 3D
Printed Hand Tutorial (Print and assemble), November 1,
2021
- SNPC_Physical_Design
Tutorial, April 22, 2021
- Edge TPU
Coral Dev Board: A tutorial, May 13, 2019
- Introduction
to Network Simulation with OMNET++: A Case of PhoenixSim,
June 1, 2016
- PHENIC
Design-Flow Poster, January 18, 2016
- OASIS
3D Fault Tolerant Router Hardware Physical Design with TSVs,
May 28, 2015
- OASIS
3D-Router Hardware Physical Design, July 8, 2014
- PHENIC:
Silicon Photonic 3D-Network-on-Chip Architecture,
September 1, 2013
- On
the Design of a 3D Network-on-Chip for Many-core SoC,
February 2012
- BANSMOM
Technical Report, 2010
- Qasm
– User Friendly Assembler for Queue Computers, 2010
- Multi-Queue
Core System on a Chip (MQSoC), 2010
- QSoC:
Implementation of a Simple Queue SoC on FPGA, January 2009
- QC-2
Data Path, October 2009
- QueueCore
– The Strong Wave, May 2007
- Verilog
HDL Tutorial, 2004
- QueueCore
Instruction Set Architecture, January 2003
- QC-1
Processing Stages Algorithms, 2003