Basic Information

Affiliation
Embedded Systems Laboratory
Title
Professor, Information Systems and Technology Director of the Center
E-Mail
kitamiti@u-aizu.ac.jp
Web site
http://eslweb.u-aizu.ac.jp/~kitamiti/indexe.html

Education

Courses - Undergraduate
Logic Circuit DesignComputer ArchitectureComputer Organization and DesignEmbedded SystemsSCCP: DIY Audio Equipment ProjectSCCP: Electronic Projects for Computer Design
Courses - Graduate
Advanced Computer ArchitectureFundamentals and Practices of Functional Safety Related Systems

Research

Specialization
Computer Engineering/Information Science
Educational Background, Biography
2013-present, Professor, The University of Aizu
2002-2013, Associate Professor, The University of Aizu
1999-2001, Assistant Professor, Osaka University
1991-1999, Research Associate, Osaka University
Current Research Theme
Formal design and verification methods for safety systems, Heuristic methods for combinatorial optimization problems and its hardware acceleration
Key Topic
Embedded Systems, Formal Approach, Heuristic methods, Hardware acceleration
Affiliated Academic Society
IEICE, IPSJ

Others

Hobbies
Reading, Music(Listening and DIY of Audio Equipments)
School days' Dream
First PC was put on the market as my junior high school student, then I was very interested in it and would like to master it.
Current Dream
I have many dreams too much , since my laboratory just started.
Motto
In the book of life, the answers are not in the back.
Favorite Books
Paul Auster, John Irving, Julian Barnes, Natsuki Ikezawa, and etc.
Messages for Students
Please get interested in many things.
Publications other than one's areas of specialization

Main research

Demand-addressable Sensor Network: for Demand-driven Large-scale Sensor Network

The aim of this research project is to construct a wide-area sensor network that interprets users’ abstract sensing demands. The network then finds the sensors that hold the data which satisfies the demand, mashes up the collected data within the network along with useful information from other systems, and finally enables the user’s terminal to display it in real time. The sensor network itself has an environmental adaptability that allows each sensor node to consider its surroundings and the user-issued requests, and which will then dynamically change its role to actively acquire the desired sensing data autonomously.

Related link:
http://col1.u-aizu.ac.jp/dasn/?lang=en

 

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System-level design and performance testing for dynamically reconfigurable systems: changing functions while the system is in operation

- Systems design
Modern societies have developed and put many different systems into use. Transport systems such as the rail network are examples of such systems that are very large. An example of a smaller system would be the mobile telephone system, but even that system is very complex.
Because it is difficult to set any particular action in practice as the direct starting point for the design of these systems, these systems are usually designed from the outset at a highly abstract level. Essentially the same thing occurs in the field of very large-scale integration, and this custom is referred to as "system-level design". For system-level design a language known as System C is used.

- Dynamically reconfigurable architecture
Where it is possible to alter a device's functions while the system to which it belongs is still operating (a feature called dynamically reconfigurable architecture), the potential exists for realizing large-scale systems using small pieces of hardware. This technical development has been attracting attention in recent years.
It is not possible, however, to automatically design such systems using traditional System C.

- Designing dynamically reconfigurable systems
Our research group has developed a dynamically reconfigurable function (the dynamic module library), which had not been possible to design using the traditional System C language or other hardware design languages. With this we have made it possible for people to design systems that include dynamically reconfigurable architecture.
At present we are adapting the proposed technique to a range of dynamically reconfigurable systems, in order to assess its worth.

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Dissertation and Published Works

1.,Shuichi Watanabe and Junji Kitamichi and Kenichi Kuroda,17th INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE LOGIC AND APPLICATIONS(FPL 2007),,Jan.,,,,A Hardware Algorithm for the Minimum p-Quasi Clique Cover Problem,2007,2.Yuji NISHIMAKI, Junji KITAMICHI and Toshiaki MIYAZAKI, IEICE TRANSACTIONS on Information and Systems,,Development of Education-purpose MIPS Processor Simulator System Visualizing Internal Operation Behavior,2013,3.,IPA(Information-technology Promotion Agency) SEC(Software Reliability Enhancement Center) Software Reliability Enhancement Promotion Committee System Fault Diagnosis WG,IPA Report,,IPA,March,IPA,IPA,,System Fault Diagnosis Methods for Large and Complicated Embedded Systems / Proposal of Post hoc V\&V by Model Base Approach,2016,4.,IPA(Information-technology Promotion Agency) SEC(Software Reliability Enhancement Center) Software Reliability Enhancement Promotion Committee System Fault Diagnosis WG,System Fault Diagnosis Methods for Large and Complicated Embedded Systems / Proposal of Post hoc V\&V by Model Base Approach,,,,,,,System Fault Diagnosis Methods for Large and Complicated Embedded Systems / Proposal of Post hoc V\&V by Model Base Approach,2017,5.,Hiroki Saito, Yoichi Tomioka and Junji Kitamichi,13th International Conference on Embedded Software and Systems,,,,,,,Proposing a Highly Reliable Real-Time Operating System for a Processor with a Fault Self-detecting Mechanism,2016,[1]Shuichi Watanabe, Junji Kitamichi, and Kenichi Kuroda, ""A Hardware Algorithm for the Minimum p-Quasi Clique Cover Problem,"" 17th International Conference on Field Programmable Logic and Applications(FPL 2007),pp.137-144(Aug. 2007).
[2]Syuhei Igari, Junji Kitamichi, Yuichi Okuyama and Kenichi Kuroda, ""Proposal of a Dynamically Reconfigurable Processor Architecture with
Multi-Accelerator ,""IP-Embedded System Conference & Exhibition(IP-SOC2011),Dec.,2011.
[3]Shuta Yamamoto, Junji Kitamichi, ""A Combinatorial Algorithm of Ant Colony Optimization and Neural Network Algorithm for Channel Assignment Problem,"" 2013 International Symposium on Nonlinear Theory and its Applications (NOLTA2013), Sep.,2013.
[4]Yuji NISHIMAKI, Junji KITAMICHI, Toshiaki MIYAZAKI, ""Development of Education-purpose MIPS Processor Simulator System Visualizing Internal Operation Behavior ,"" IEICE TRANSACTIONS on Information and Systems (Japanese Edition) vol.J96-D No.10,pp.2130-2138,Oct.,2013..
[5]IPA/SEC,System Fault Diagnosis WG(Kozou OKANO, Junji KITAMICHI:Chap. 6), ""System Fault diagnosis methods for Large & Complicated Embedded Systems"",IPA/SEC, Software Reliability Enhancement Promotion Committee, March,2016."