3D Spiking Neuromorphic Processor

Overview

Neuromorphic computing uses Spiking Neuron Network models to solve machine learning problems in a more power/energy-efficient way when compared to the conventional Artificial Neural Networks.
This project aims to research and develop an adaptive low-power spiking neural network system in hardware (NASH) empowered with our earlier developed fault-tolerant three-dimensional on-chip interconnect technology. The NASH system features the following: (1) An efficient adaptive configuration method to enable the reconfiguration of different SNN parameters (spike weights, routing, hidden layers, topology, etc.), (2) A mixture of different deep NN topologies, (3) An efficient fault-tolerant multicast spike routing algorithm, (4) An efficient on-chip learning mechanism.
To demonstrate the performance of the NASH system, an FPGA implementation shall be developed, and a VLSI implementation shall also be established.