Publications

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Journal Papers

  1. Zhishang Wang,Yuxiao Liang, Achraf Ben Ahmed, Khanh N., Dang, Abderazek Ben Abdallah, ''Edge-Driven Dynamic Two-Tier Blockchain for Energy Trading in Vehicle-To-Grid Networks,'' in IEEE Transactions on Vehicular Technology, 2025, doi: 10.1109/TVT.2025.3620034
  2. Ryoji Kobayashi1, Ngo-Doanh Nguyen, Abderazek Ben Abdallah, Nguyen Anh Vu Doan and Khanh N. Dang, "ApproxiMorph: Energy-efficient Neuromorphic System with Layer-wise Approximation of Spiking Neural Networks and 3D-Stacked SRAM", in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, doi: 10.1109/TCAD.2025.3597251.
  3. N. -D. Nguyen, K. N. Dang, A. B. Ahmed, A. Ben Abdallah and X. -T. Tran, "NOMA: A Novel Reliability Improvement Methodology for 3-D IC-based Neuromorphic Systems," in IEEE Transactions on Components, Packaging and Manufacturing Technology, doi: 10.1109/TCPMT.2024.3488113.
  4. M. Maatar, Z. Wang, K. N. Dang and A. Ben Abdallah, "BTSAM: Balanced Thermal-State-Aware Mapping Algorithms and Architecture for 3D-NoC-Based Neuromorphic Systems," in IEEE Access, vol. 12, pp. 126679-126692, 2024, doi: 10.1109/ACCESS.2024.3425900.
  5. K. N. Dang, N. A. V. Doan, N. -D. Nguyen and A. B. Abdallah, "HeterGenMap: An Evolutionary Mapping Framework for Heterogeneous NoC-Based Neuromorphic Systems," in IEEE Access, vol. 11, pp. 144095-144112, 2023, doi: 10.1109/ACCESS.2023.3345168.
  6. Y. Liang, Z. Wang and A. Ben Abdallah, "Robust Vehicle-to-Grid Energy Trading Method Based on Smart Forecast and Multi-Blockchain Network," in IEEE Access, vol. 12, pp. 8135-8153, 2024, doi: 10.1109/ACCESS.2024.3352631.
  7. Z. Wang, M. Hisada and A. Ben Abdallah, "A Hybrid Clustered Approach for Enhanced Communication and Model Performance in Blockchain-Based Collaborative Learning," in IEEE Access, vol. 12, pp. 16975-16988, 2024, doi: 10.1109/ACCESS.2024.3359272.
  8. N. -D. Nguyen, A. B. Ahmed, A. Ben Abdallah and K. N. Dang, "Power-Aware Neuromorphic Architecture With Partial Voltage Scaling 3-D Stacking Synaptic Memory," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 31, no. 12, pp. 2016-2029, Dec. 2023, doi: 10.1109/TVLSI.2023.3318231.
  9. W. Y. Yerima, K. N. Dang and A. B. Abdallah, "R-MaS3N: Robust Mapping of Spiking Neural Networks to 3D-NoC-Based Neuromorphic Systems for Enhanced Reliability," in IEEE Access, vol. 11, pp. 94664-94678, 2023, doi: 10.1109/ACCESS.2023.3311031.
  10. N. -D. Nguyen, X. -T. Tran, A. B. Abdallah and K. N. Dang, "An In-Situ Dynamic Quantization With 3D Stacking Synaptic Memory for Power-Aware Neuromorphic Architecture," in IEEE Access, vol. 11, pp. 82377-82389, 2023, doi: 10.1109/ACCESS.2023.3301560.
  11. W. Y. Yerima, O. M. Ikechukwu, K. N. Dang and A. Ben Abdallah, "Fault-Tolerant Spiking Neural Network Mapping Algorithm and Architecture to 3D-NoC-Based Neuromorphic Systems," in IEEE Access, vol. 11, pp. 52429-52443, 2023, doi: 10.1109/ACCESS.2023.3278802.
  12. Y. Liang, Z. Wang and A. B. Abdallah, "V2GNet: Robust Blockchain-Based Energy Trading Method and Implementation in Vehicle-to-Grid Network," in IEEE Access, vol. 10, pp. 131442-131455, 2022, doi: 10.1109/ACCESS.2022.3229432.
  13. Wang, Jiangkun, Ogbodo Mark Ikechukwu, Khanh N. Dang, and Abderazek Ben Abdallah, "Spike-Event X-ray Image Classification for 3D-NoC-Based Neuromorphic Pneumonia Detection" Electronics 11, no. 24: 4157. https://doi.org/10.3390/electronics11244157.
  14. Z. Wang and A. Ben Abdallah, "A Robust Multi-Stage Power Consumption Prediction Method in a Semi-Decentralized Network of Electric Vehicles," in IEEE Access, vol. 10, pp. 37082-37096, 2022, doi: 10.1109/ACCESS.2022.3163455.
  15. K. N. Dang, N. A. V. Doan and A. Ben Abdallah, "MigSpike: A Migration Based Algorithms and Architecture for Scalable Robust Neuromorphic Systems," in IEEE Transactions on Emerging Topics in Computing, vol. 10, no. 2, pp. 602-617, 1 April-June 2022, doi: 10.1109/TETC.2021.3136028.
  16. Abderazek Ben Abdallah, Khanh N. Dang, “Toward Robust Cognitive 3D Brain-inspired Cross-paradigm System,'' Frontier in Neuroscience 15:690208, doi: 10.3389/fnins.2021.690208
  17. K. N. Dang, A. B. Ahmed, A. B. Abdallah and X. -T. Tran, "HotCluster: A Thermal-Aware Defect Recovery Method for Through-Silicon-Vias Toward Reliable 3-D ICs Systems," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 41, no. 4, pp. 799-812, April 2022, doi: 10.1109/TCAD.2021.3069370.
  18. O. M. Ikechukwu, K. N. Dang and A. B. Abdallah, "On the Design of a Fault-Tolerant Scalable Three Dimensional NoC-Based Digital Neuromorphic System With On-Chip Learning," in IEEE Access, vol. 9, pp. 64331-64345, 2021, doi: 10.1109/ACCESS.2021.3071089.
  19. K. N. Dang, A. B. Ahmed, A. B. Abdallah and X. -T. Tran, "TSV-OCT: A Scalable Online Multiple-TSV Defects Localization for Real-Time 3-D-IC Systems," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 28, no. 3, pp. 672-685, March 2020, doi: 10.1109/TVLSI.2019.2948878.
  20. Z. Wang, M. Ogbodo, H. Huang, C. Qiu, M. Hisada and A. B. Abdallah, "AEBIS: AI-Enabled Blockchain-Based Electric Vehicle Integration System for Power Management in Smart Grid Platform," in IEEE Access, vol. 8, pp. 226409-226421, 2020, doi: 10.1109/ACCESS.2020.3044612.
  21. K. N. Dang, A. B. Ahmed, A. B. Abdallah and X. -T. Tran, "A Thermal-Aware On-Line Fault Tolerance Method for TSV Lifetime Reliability in 3D-NoC Systems," in IEEE Access, vol. 8, pp. 166642-166657, 2020, doi: 10.1109/ACCESS.2020.3022904.
  22. K. N. Dang, M. C. Meyer, A. B. Ahmed, A. B. Abdallah and X. -T. Tran, "Scalable Design Methodology and Online Algorithm for TSV-Cluster Defects Recovery in Highly Reliable 3D-NoC Systems," in IEEE Transactions on Emerging Topics in Computing, vol. 8, no. 3, pp. 577-590, 1 July-Sept. 2020, doi: 10.1109/TETC.2017.2762407.
  23. K. N. Dang, M. C. Meyer, A. B. Ahmed, A. B. Abdallah and X. -T. Tran, "A Non-Blocking Non-Degrading Multiple Defects Link Testing Method for 3D-Networks-on-Chip," in IEEE Access, vol. 8, pp. 59571-59589, 2020, doi: 10.1109/ACCESS.2020.2982836.
  24. The H. Vu,Yuichi Okuyama, Abderazek Ben Abdallah, “Comprehensive Analytic Performance Assessment and K-means based Multicast Routing Algorithms and Architecture for 3D-NoC of Spiking Neurons,” ACM Journal on Emerging Technologies in Computing Systems (JETC), Vol. 15, No. 4, Article 34, October 2019. doi: 10.1145/3340963
  25. T. H. Vu, O. M. Ikechukwu and A. Ben Abdallah, "Fault-Tolerant Spike Routing Algorithm and Architecture for Three Dimensional NoC-Based Neuromorphic Systems," in IEEE Access, vol. 7, pp. 90436-90452, 2019, doi: 10.1109/ACCESS.2019.2925085.
  26. The H. Vu, Yuichi Okuyama, Abderazek Ben Abdallah, ‘’Analytical performance assessment and high‑throughput low‑latency spike routing algorithm for spiking neural network systems,’’ Journal of Supercomputing 75, pp. 5367–5397 (2019). https://doi.org/10.1007/s11227-019-02792-y
  27. Michael Meyer, Yuichi Okuyama, Abderazek Ben Abdallah, ”SAFT-PHENIC: a thermal-aware microring fault-resilient photonic NoC,” The Journal of Supercomputing, Volume 74, Issue 9, pp 4672–4695, 2018. DOI: 10.1007/s11227-018-2463-x
  28. Khanh N. Dang, Akram Ben Ahmed, Xuan-Tu Tran, Yuichi Okuyama, Abderazek Ben Abdallah, ”A Comprehensive Reliability Assessment of Fault-Resilient Network-on-Chip Using Analytical Model”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 25, Issue: 11, pp. 3099 – 3112, vol. 2017. DOI: 10.1109/TVLSI.2017.2736004.
  29. A. B. Ahmed, T. Yoshinaga and A. Ben Abdallah, "Scalable Photonic Networks-on-Chip Architecture Based on a Novel Wavelength-Shifting Mechanism," in IEEE Transactions on Emerging Topics in Computing, vol. 8, no. 2, pp. 533-544, 1 April-June 2020, doi: 10.1109/TETC.2017.2737016.
  30. Khanh N. Dang, Michael Meyer, Yuichi Okuyama, Abderazek Ben Abdallah, ”A Low-overhead Soft-Hard Fault Tolerant Architecture, Design and Management Scheme for Reliable High-performance Many-core 3D-NoC Systems,” Journal of Supercomputing (2017) 73:2705–2729.
  31. Achraf Ben Ahmed, A. Ben Abdallah, ''Architecture and Design of Real-Time Systems for Elderly Health Monitoring,'' Journal of Embedded Systems, 2017, Vol.9, No.5, pp.484 – 494, DOI: 10.1504/IJES.2017.10007717.
  32. Michael Meyer, Yuichi Okuyama, Abderazek Ben Abdallah, ”Microring Fault-resilient Photonic Network-on-Chip for Reliable High-performance Many-core Systems,” The Journal of Supercomputing, Volume 73, Issue 4, pp 1567–1599 , April 2017. doi: 10.1007/s11227-016-1846-0.
  33. Achraf Ben Ahmed, Abderazek Ben Abdallah,''An Energy-Efficient High-Throughput Mesh-Based Photonic On-Chip Interconnect for Many-Core Systems,'' Photonics 2016, 3(2), 15; [https://doi.org/10.3390/photonics3020015](https://doi.org/10.3390/photonics3020015).
  34. Akram Ben Ahmed, Abderazek Ben Abdallah, ”Adaptive Fault-Tolerant Architecture and Routing Algorithm for Reliable Many-Core 3D-NoC Systems”, Journal of Parallel and Distributed Computing, Volumes 93–94, July 2016, Pages 30-43, ISSN 0743-7315, doi:10.1016/j.jpdc.2016.03.014.
  35. Achraf Ben Ahmed, Abderazek Ben Abdallah,“Hybrid Silicon-Photonic Network-on-Chip for Future Generations of High-performance Many-core Systems,” The Journal of Supercomputing, Dec. 2015, Vol. 71, Issue 12, pp 4446-4475. DOI: 10.1007/s11227-015-1539-0.
  36. Akram Ben Ahmed, A. Ben Abdallah,Graceful Deadlock-Free Fault-Tolerant Routing Algorithm for 3D Network-on-Chip Architectures,” Journal of Parallel and Distributed Computing, 74/4 (2014), pp. 2229-2240.
  37. Akram Ben Ahmed, A. Ben Abdallah, ”Architecture and Design of High-throughput, Low-latency and Fault-Tolerant Routing Algorithm for 3D-Network-on-Chip,” The Journal of Supercomputing, December 2013, Volume 66, Issue 3, pp 1507-1532.
  38. Abderazek Ben Abdallah, M. Masuda, A. Canedo, K. Kuroda, “Natural Instruction Level Parallelism-aware Compiler for High-Performance QueueCore Processor Architecture,” The Journal of Supercomputing, Volume 57, Number 3, pp. 314-338, Sept. 2011.
  39. Arquimedes Canedo, Abderazek Ben Abdallah, Masahiro Sowa, “Compiling for Reduced Bit-Width Queue Processors,” Journal of Signal Processing Systems, Volume 59, Number 1, 45-55, 2010.
  40. Arquimedes Canedo, Abderazek Ben Abdallah, Masahiro Sowa, “Efficient Compilation for Queue Size-Constrained Queue Processors”, Journal of Parallel Computing, Vol.35, pp. 213-225, 2009.
  41. Arquimedes Canedo, Abderazek Ben Abdallah, Masahiro Sowa, “Design and Implementation of a Queue Compiler”, Journal of Microprocessors and Microsystems, Vol. 33, Issue 2, pp. pp. 29-138, 2009.
  42. Arquimedes Canedo, Abderazek Ben Abdallah, Masahiro Sowa, Compiler Support for Code Size Reduction using a Queue-based Processor, Transactions on High-Performance Embedded Architectures and Compilers, Vol. 2, Issue 4, pp. 269-285, 2009.
  43. Abderazek Ben Abdallah, A. Canedo, T. Yoshinaga, M. Sowa, “The QC-2 Parallel Queue Processor Architecture,” Jnl. of Parallel and Distributed Computing, Vol. 68, No. 2, pp. 235-245, 2008.
  44. Md. Musfiquzzaman Akanda, Abderazek Ben Abdallah, and Masahiro Sowa, “Dual-Execution Mode Processor Architecture,” The Journal of Supercomputing, Vol. 44, No. 2, pp. 103-125, 2008.
  45. A. Acanda, Ben Abdallah, and M. Sowa, “A New Code Generation Algorithm for 2-offset Producer Order Queue Computation Model,” Journal of Computer Languages, Systems & Structures, Vol. 34, Issue 4, pp. 184-194, 2007.
  46. A. Ben Abdallah, and M. Sowa, Advanced Power Management Techniques for Mobile Communication Systems,” Journal of Computer Research, Vol. 14, No.2, pp. 109-128, 2007.
  47. Md. Musfiquzzaman Akanda, A. Ben Abdallah, and M. Sowa, “Dual-Execution Mode Processor Architecture For Embedded Applications,” Journal of Mobile Multimedia, Vol. 3, No.4, Dec. 2007, pp. 347-370.
  48. A. Ben Abdallah, T. Yoshinaga, M. Sowa, “High-Level Modeling and FPGA Prototyping of Produced Order Parallel Queue Processor Core,” The Journal of Supercomputing, Vol. 38, Number 1, pp. 3-15, 2006.
  49. Abderazek Ben Abdallah, Sotaro Kawata, Masahiro Sowa, Design and Architecture for an Embedded 32-bit Queue Core,” Journal of Embedded Computing, Special Issue in embedded single-chip multicore architectures, Vol. 2, No. 2, pp. 191-205, 2006.
  50. Viet, T. Yoshinaga, A. Ben Abdallah, and Masahiro Sowa, “Construction of Hybrid MPI-OpenMP Solutions for SMP Clusters,” IPSJ Transactions on Advanced Computing Systems, Vol.46, pp.25-37, Jan. 2005.
  51. M. Sowa, A. Ben Abdallah, and T. Yoshinaga, “Parallel Processor Architecture Based on Produced Order Computation Model,” The Journal of Supercomputing, Vol. 32, No. 3, pp. 217-229, June 2005.
  52. Abderazek Ben Abdallah, Mudar Sarem, Masahiro. Sowa, Dynamic Fast Issue Mechanism (DFI) for Dynamic Scheduled Processors,” IEICE Transactions on Fundamentals of Electronics, Communications, and Computer Science, Vol. E83-A No.12 pp.2417-2425, Dec. 2000.

Conference Papers

  1. Kitsum Yiu, Zhishang Wang, Khanh N. Dang and Abderazek Ben Abdallah, 'Integrating Speech Recognition with the Software and Hardware Tool in Software Defined Vehicles', ETLTC2025, January 2025, Aizu-Wakamatsu

  2. Kaisei Kaneko, Zhishang Wang, Khanh N. Dang and Abderazek Ben Abdallah, 'Research on Energy Trading System in Vehicle-to-Grid Networks', ETLTC2025, January 2025, Aizu-Wakamatsu

  3. Jiangkun Wang, Khanh N. Dang and Abderazek Ben Abdallah, “Scaling Deep-Learning Pneumonia Detection Inference on a Reconfigurable Self-Contained Hardware Platform”, 2023 IEEE 6th International Conference on Electronics Technology (ICET), May 12-15, 2023. Best Student Paper Award.

  4. Mohamed Maatar, Khanh N. Dang and Abderazek Ben Abdallah, “Thermal-Aware Task-Mapping Algorithm and Architecture for 3D-NoC-Based Event-Driven Neuromorphic System”, 2023 IEEE 6th International Conference on Electronics Technology (ICET), May 12-15, 2023.

  5. Cheng Hong, Sinchhean Phea, Khanh N. Dang, Abderazek Ben Abdallah, 'The AIzuHand Neuromorphic Prosthetic Hand,' ETLTC2023, January 24-27, 2023

  6. Yamato Saikawa, Khanh N. Dang, Abderazek Ben Abdallah, 'Multimodal sEMG and Speech-Based Design and Evaluation of a Low-Cost', ETLTC2023, January 24-27, 2023

  7. Yu Yajima, Zhishang Wang, Abderazek Ben Abdallah, 'Robust Collaborative Learning Against Poisoning Attacks in Electric Vehicles Network,' ETLTC2023, January 24-27, 2023

  8. Mark Ogbodo, Abderazek Ben Abdallah, 'Study of a Multi-modal Neurorobotic Prosthetic Arm Control System based on Recurrent Spiking Neural Network,' ETLTC2022, January 25-28, 2022

  9. Yamato Saikawa, Abderazek Ben Abdallah, 'Study of Deep Learning-based Hand Gesture Recognition Toward the Design of a Low-cost Prosthetic Hand', ETLTC2022, January 25-28, 2022

  10. Masaki Watanabe, Abderazek Ben Abdallah, 'A Low-cost Raspberry Pi-based Control System for Upper Limb Prosthesis,' ETLTC2022, January 25-28, 2022

  11. Sinchhean Phea, Abderazek Ben Abdallah, 'An Affordable 3D-printed Open-Loop Prosthetic Hand Prototype with Neural Network Learning EMG-Based Manipulation for Amputees,' ETLTC2022, January 25-28, 2022

  12. Yuuki Okada, Jiangkun Wang, Tomohide Fukuchi and Abderazek Ben Abdallah, 'Parallelization and Hardware Mapping of Deep Neural Network on Re-configurable Platform for AI-Enabled Biomedical System,' ETLTC2022, January 25-28, 2022

  13. Ogbodo Mark Ikechukwu, Khanh N. Dang and Abderazek Ben. Abdallah, “Energy-efficient Spike-based Scalable Architecture for Next-generation Cognitive AI Computing Systems,” Springer Lecture Note in Computer Science (LNCS), International Symposium on Ubiquitous Networking 2021 (UNET21), May 19 – May 22, 2021, Marakesh, Morocco. (Best Student Paper Award)

  14. Naoto Ageishi, Fukuchi Tomohide, Abderazek Ben Abdallah, 'Real-time Hand-Gesture Recognition based on Deep Neural Network,' 3rd ETLTC2021 -ACM Chapter Int. Conference on Information and Comm. Technology, January 27-30, 2021, Aizu-Wakamatsu, Japan, SHS Web of Conferences 102, 04009 (2021), 10.1051/shsconf/202110204009

  15. Miyuka Nakamura, Jiangkun Wang, Sinchhean Phea, Abderazek Ben Abdallah, 'Comprehensive Study of Coronavirus Disease 2019 (COVID-19) Classification based on Deep Convolution Neural Networks,' 3rd ETLTC2021-ACM Chapter Int. Conference on Information and Comm. Technology, January 27-30, 2021, Aizu-Wakamatsu, Japan, SHS Web of Conferences 102, 04007 (2021), DOI:10.1051/shsconf/202110204007

  16. Okada Yuuki, Jiangkun Wang, Ogbodo Mark Ikechukwu, Abderazek Ben Abdallah, 'Hardware Acceleration of Convolution Neural Network for AI-Enabled Realtime Biomedical System,' 3rd ETLTC2021-ACM Chapter Int. Conference on Information and Comm. Technology, January 27-30, 2021, Aizu-Wakamatsu, Japan, SHS Web Conf., 102 (2021) 04019, DOI:10.1051/shsconf/202110204019

  17. Sinchhean Phea, Zhishang Wang, Jiangkun Wang, Abderazek Ben Abdallah, 'Optimization and Implementation of a Collaborative Learning Algorithm for an AI-Enabled Real-time Biomedical System,' 3rd ETLTC2021-ACM Chapter Int. Conference on Information and Comm. Technology, January 27-30, 2021, Aizu-Wakamatsu, Japan, SHS Web Conf., 102 (2021) 04017, DOI: 10.1051/shsconf/202110204017 (Best Paper Award)

  18. H. Huang, M. Ogbodo, Z. Wang, C. Qiu, M. Hisada and A. Ben-Abdallah, "Smart Energy Management System based on Reconfigurable AI Chip and Electrical Vehicles," 2021 IEEE International Conference on Big Data and Smart Computing (BigComp), Jeju Island, Korea (South), 2021, pp. 233-238, doi: 10.1109/BigComp51126.2021.00051.

  19. Khanh N. Dang, Akram Ben Ahmed, Fakhrul Zaman Rokhani, Abderazek Ben Abdallah, and Xuan-Tu Tran, ‘‘A thermal distribution, lifetime reliability prediction and spare TSV insertion platform for stacking 3D NoCs’’, 2020 International Conference On Advanced Technologies For Communications (ATC), Nov. 8-10, 2020, Nha Trang, Vietnam

  20. Tomohide Fukuchi, Ogbodo Mark Ikechukwu, Abderazek Ben Abdallah. 'Design and Optimization of a Deep Neural Network Architecture for Traffic Light Detection,' ACM Chapter International Conference on Educational Technology, Language and Technical Communication (ETLTC), January 27-31, 2020, Aizuwakamatsu, Japan.

  21. Ogbodo Mark Ikechukwu, Khanh N. Dang, Tomohide Fukuchi, Abderazek Ben Abdallah, “Architecture and Design of a Spiking Neuron Processor Core Towards the Design of a Large-scale Event-Driven 3D-NoC-based Neuromorphic Processor”, ACM Chapter International Conference on Educational Technology, Language and Technical Communication (ETLTC), January 27-31, 2020, Aizuwakamatsu, Japan.

  22. Mark Ogbodo, The Vu, Khanh N. Dang and Abderazek Abdallah, “Light-weight Spiking Neuron Processing Core for Large-scale 3D-NoC based Spiking Neural Network Processing Systems”, The 7th IEEE International Conference on Big Data and Smart Computing, Feb 19, 2020 - Feb 22, 2020, Pusan, South Korea

  23. Khanh N. Dang and Abderazek Ben Abdallah “An Efficient Software-Hardware Design Framework for Spiking Neural Network Systems”, 2019 IEEE International Conference on Internet of Things, Embedded Systems and Communications (IINTEC 2019), Tunis, Tunisia, 2019, pp. 155-162. DOI: 10.1109/IINTEC48298.2019.9112123

  24. Khanh N. Dang, Michael Meyer, Akram Ben Ahmed, Abderazek Ben Abdallah, and Xuan-Tu Tran, “2D-PPC: A single-correction multiple-detection method for Through-Silicon-Via Faults”, 2019 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2019), Nov. 11-14, 2019.

  25. Khanh N. Dang, Akram Ben Ahmed, Ben Abdallah Abderazek and Xuan-Tu Tran, “TSV-IaS: Analytic analysis and low-cost non-preemptive on-line detection and correction method for TSV defects'', IEEE Symposium on VLSI (ISVLSI) 2019, pp. 301-306, Jul. 15-17, 2019 . DOI: 10.1109/ISVLSI.2019.00096

  26. The H. Vu, Abderazek Ben Abdallah, 'A Low-latency K-means based Multicast Routing Algorithm and Architecture for Three Dimensional Spiking Neuromorphic Chips', IEEE International Conference on Big Data and Smart Computing (BigComp 2019), Kyoto, Japan, Feb 28 - Mar 2, 2019 [Best Paper Award]

  27. The H. Vu, Ryunosuke Murakami, Yuichi Okuyama, Abderazek Ben Abdallah, ”Efficient Optimization and Hardware Acceleration of CNNs towards the Design of a Scalable Neuro-inspired Architecture in Hardware”, IEEE International Conference on Big Data and Smart Computing (BigComp 2018), Shanghai, China, January 15-18, 2018.

  28. Khanh N. Dang, Michael Meyer, Yuichi Okuyama, Abderazek Ben Abdallah, ”Reliability Assessment and Quantitative Evaluation of Soft-Error Resilient 3D NoC System”, 25th IEEE Asian Test Symposium (ATS’16), November 21-24, 2016

  29. Khanh N. Dang, Yuichi Okuyama, Abderazek Ben Abdallah, ”Soft-Error Resilient Network-on-Chip for Safety-Critical Applications”, 2016 IEEE International Conference on Integrated Circuit Design and Technology (ICICDT), June 27 – 29, 2016

  30. Khanh N. Dang, Michael Meyer, Yuichi Okuyama, Abderazek Ben Abdallah, “A Soft-Error Resilient 3D Network-on-Chip Router for Highly-reliable Multi-core Systems”, IEEE 7th International Conference on Awareness Science and Technology (iCAST 2015), Sep. 22-24, 2015.

  31. Achraf Ben Ahmed, Michael Meyer, Yuichi Okuyama, Abderazek Ben Abdallah, ”Hybrid Photonic NoC based on Non-blocking Photonic Switch and Light-weight Electronic Router”, Proc. of the IEEE International Conference on Systems, Man, and Cybernetics (SMC2015), Oct. 9-12,  2015.

  32. Michael Meyer, Akram Ben Ahmed, Yuichi Okuyama, Abderazek Ben Abdallah, ”Microring Fault-resilient Optical Router for Reliable Network-on-Chip Systems”, Proc. of 9th IEEE International Symposium on Embedded Multicore/Manycore SoCs (MCSoC-15), Sept. 2015.

  33. Michael Meyer, Akram Ben Ahmed, Yuki Tanaka, Abderazek Ben Abdallah, “On the Design of a Fault-tolerant Photonic Network-on-Chip,” Proc. of the IEEE International Conference on Systems, Man, and Cybernetics (SMC2015), Oct. 9-12, 2015.

  34. Achraf Ben Ahmed, Yuichi Okuyama, Abderazek Ben Abdallah,”Non-blocking Electro-optic Network-on-Chip Router for High-throughput and Low-power Many-core Systems”, Proc. of the World Congress on Information Technology and Computer Applications 2015, June 11-13, 2015

  35. Achraf Ben Ahmed, Michael Meyer, Yuichi Okuyama, Abderazek Ben Abdallah,”Efficient Router Architecture, Design and Performance Exploration for Many-core Hybrid Photonic Network-on-Chip (2D-PHENIC)”, Proc. Of the International Conference on Information Science and Control Engineering, 04/2015.

  36. Achraf Ben Ahmed, M. Meyer, Y. Okuyama, and A. Ben Abdallah, ”Adaptive Error- and Traffic Aware Router Architecture for 3D Network-on-Chip Systems”, IEEE Proceedings of the 8th International Symposium on Embedded Multicore/Manycore SoCs (MCSoC-14), pp. 197-2014, Sept. 2014.

  37. Achraf Ben Ahmed, A. Ben Abdallah, ”PHENIC: Towards Photonic 3D-Network-on-Chip Architecture for High-throughput Many-core Systems-on-Chip”, IEEE Proceedings of the 14th International Conference on Sciences and Techniques of Automatic control and computer engineering, 2013

  38. Akram Ben Ahmed, A. Ben Abdallah, ”Fault-tolerant Routing Algorithm with Deadlock Recovery Support for 3D-NoC Architectures”, IEEE Proceedings of the 7th International Symposium on Embedded Multicore SoCs, Sept. 2013

  39. Achraf Ben Ahmed, A. Ben Abdallah, ”Hardware/Software Prototyping of Dependable Real-Time System for Elderly Health Monitoring”, IEEE Proc. of the World Congress on Computer and IT, ICMAES, June 2013.

  40. Akram Ben Ahmed, T. Ouchi, S. Miura, A. Ben Abdallah, ”Run-Time Monitoring Mechanism for Efficient Design of Application-specific NoC Architectures in Multi/Manycore Era”, Proc. IEEE 6th International Workshop on Engineering Parallel and Multicore Systems (ePaMuS2013′), July 2013.

  41. Akram Ben Ahmed, A. Ben Abdallah, ”Low-overhead Routing Algorithm for 3D Network-on-Chip”, IEEE Proc. of The Third International Conference on Networking and Computing (ICNC’12), pp. 23-32, 2012.

  42. Akram Ben Ahmed, A. Ben Abdallah, ”LA-XYZ: Low Latency, High Throughput Look-Ahead Routing Algorithm for 3D Network-on-Chip (3D-NoC) Architecture”, IEEE Proceedings of the 6th International Symposium on Embedded Multicore SoCs (MCSoC-12), pp. 167-174, 2012.

  43. Achraf Ben Ahmed, Yumiko Kimezawa, A. Ben Abdallah, ”Towards Smart Health Monitoring System for Elderly People”, IEEE Proceedings of The 4th International Conference on Awareness Science and Technology, pp. 248-253, 2012.

  44. Akram Ben Ahmed, A. Ben Abdallah, ”ONoC-SPL Customized Network-on-Chip (NoC) Architecture and Prototyping for Data-intensive Computation Applications”, IEEE Proceedings of The 4th International Conference on Awareness Science and Technology, pp. 257-262, 2012.

  45. A. Ben Ahmed, A. Ben Abdallah, K. Kuroda, ”Architecture and Design of Efficient 3D Network-on-Chip (3D NoC) for Custom Multicore SoCs”, IEEE Proc. of the 5th International Conference on Broadband, Wireless Computing, Communication and Applications (BWCCA-2010), Nov. 2010. [Best Paper Award]

  46. K. Mori, A. Esch, A. Ben Abdallah, K. Kuroda, ”Advanced Design Issues for OASIS Network-on-Chip Architecture”, IEEE Proc. of the 5th International Conference on Broadband, Wireless Computing, Communication and Applications (BWCCA-2010), Nov. 2010, pp. 74-79.

  47. M. Masuda, A. Ben Abdallah, A. Canedo, ”Software and Hardware Design Issues for Low-Complexity High-Performance Processor Architecture”, IEEE ICPPW’09 Proc. of the 2009 International Conference on Parallel Processing Workshops, pp. 558-565, 2009.

  48. Y. Haga, A. Ben Abdallah, and K. Kuroda, ”Embedded MCSoC Architecture and Period-Peak Detection (PPD) Algorithm for ECG/EKG Processing”, The 19th Intelligent System Symposium (FAN 2009), pp.298-303, Sep. 2009.

  49. S. Miura, A. Ben Abdallah, and K. Kuroda, ”PNoC – Design and Preliminary Evaluation of a Parameterizable NoC for MCSoC Generation and Design Space Exploration”, The 19th Intelligent System Symposium (FAN 2009), pp.314-317, Sep. 2009.

  50. K. Mori, A. Ben Abdallah, and K. Kuroda, ”Design and Evaluation of a Complexity-Effective Network-on-Chip Architecture on FPGA”, The 19th Intelligent System Symposium (FAN 2009), pp.318-321, Sep. 2009.

  51. M. Masuda, A. Canedo, A. Ben Abdallah, ”Efficient Code Generation Algorithm for Natural Instruction Level Parallelism-aware Queue Architecture”, The 19th Intelligent System Symposium (FAN 2009), pp.308-313, Sep. 2009. (Best Presentation Award).

  52. T. Maekawa, A. Ben Abdallah, and K. Kuroda, ”Single Instruction Dual-Execution Model Processor Architecture”, Proc. IEEE/IFIP Int’l Conf. on Embedded and Ubiquitous Computing (EUC2008), pp.30-36, Dec. 2008.

  53. H. Hoshino, A. Ben Abdallah, and K. Kuroda, ”Advanced Optimization and Design Issues of a 32-bit Embedded Processor Based on Produced Order Queue Computation Model”, IEEE/IFIP Int’l Conf. on Embedded and Ubiquitous Computing (EUC2008),pp.16-22, Dec.2008.

  54. A. Canedo, A. Ben Abdallah, and M. Sowa, ”Quantitative Evaluation of Common Sub-expression Elimination on Queue Machines”, Proc. IEEE Int’l Sym. on Parallel Architectures, Algorithms, and Networks (I-SPAN 2008), pp.25-30. 2008.

  55. Arquimedes Canedo, Ben Abdallah Abderazek, Masahiro Sowa, 'New Code Generation Algorithm for QueueCore - An Embedded Processor with High ILP,' 8th International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT 2007), Adelaide, Australia, Dec. 3-6, 2007 (Best Paper Award)

  56. A. Ben Abdallah, T Yoshinaga, and M. Sowa, ”Mathematical Model for Multiobjective Synthesis of NoC Architectures”, IEEE Proc. of the 36th International Conference on Parallel Processing, Sept. 2007.

  57. A. Canedo, A. Ben Abdallah, and M. Sowa, ”Queue Register File Optimization Algorithm for QueueCore Processor”, Proc. IEEE 19th International Symposium on Computer Architecture and High-Performance Computing (SBAC-PAD 2007), pp. 169-176, 2007.

  58. A. Canedo, A. Ben Abdallah, and M. Sowa, ”An Efficient Code Generation Algorithm for Code Size Reduction using 1-offset P-Code Queue Computation Model”, Proc. IFIP International Conference on Embedded and Ubiquitous Computing (EUC07), pp. 196-208, 2007

  59. A. Canedo, A. Ben Abdallah, and M. Sowa, ”Compiler Framework for an Embedded 32-bit Queue Processor”, Proc. of the International Conference on Convergence Information Technology (ICCIT07), Gyeongju, South Korea, pp. 877-884, 2007.

  60. A. Ben Abdallah, T. Yoshinaga, and M. Sowa, ”Scalable Core-Based Methodology and Synthesizable Core for Systematic Design Environment in Multicore SoC (MCSoC)”, Proc. IEEE 35th International Conference on Parallel Processing Workshops, Aug. 14-18th, pp. 345-352, 2006.

  61. A. Ben Abdallah, Masahiro Sowa, ”Basic Network-on-Chip Interconnection for Future Gigascale MCSoCs Applications: Communication and Computation Orthogonalization”, Proc. of the Joint Symposium on Science, Society and Technology (JASSST2006), pp. 1-7, Dec. 4-9th, 2006.

  62. A. Ben Abdallah, M. Arsenji, S. Shigeta, T. Yoshinaga, and M. Sowa, ”Modular Design Structure and High-Level Prototyping for Novel Embedded Processor Core”, Proc. of International Conference on Embedded and Ubiquitous Computing(EUC2005), LNCS Vol.3824, pp. 340-349, 2005.

  63. M. Akanda, A. Ben Abdallah, S. Kawata, and M. Sowa, ”An Efficient Dynamic Switching Mechanism (DSM) for Hybrid Processor Architecture”, Proc. of International Conference on Embedded and Ubiquitous Computing (EUC2005), LNCS Vol.3824, pp. 77-86, Dec. 2005.

  64. A. Markovskij, A. Ben Abdallah, S. Kawata, and M. Sowa, ”Architecture of Produced-order Parallel Queue Processor: Preliminary Evaluation”, Proc. of the 38th International Symposium on Microarchitecture (MICRO-38), Nov. 2005.

  65. Ta Quo Viet, T. Yoshinaga, and A Ben Abdallah, ”Performance Enhancement for Matrix Multiplication on an SMP PC Cluster”, Summer United Workshops on Parallel, Distributed and Cooperative Processing, August 2005.

  66. A. Ben Abdallah, Markov Arsenji, S. Shigeta, T. Yoshinaga, and M. Sowa, ”Queue Processor for Novel Queue Computing Paradigm Based on Produced Order Scheme”, Proc. IEEE of the 7th High-Performance Computing and Grid in Asia Pacific Region (HPCAsia2004), pp. 169-177, July 2004.

  67. Shigeta, L.-Q. Wang, N. Yagishita, A. Ben Abdallah, T. Yoshinaga, and M. Sowa, ”QJava: Integrate Queue Computational Model into Java”, Proc. of the Joint Japan-Tunisia Workshop on Computer Systems and Information Technology (JT-CSIT’04), July 2004.

  68. A. Markovskij, M. Sowa, A. Ben Abdallah, S. Shigeta, and T. Yoshinaga, ”Design of Producer-Order Parallel Queue Processor Architecture”, Proc. of International Workshop on Modern Science and Technology (IWMST 2004), September 2-3, 2004.

  69. M. Akanda, A. Ben Abdallah, S. Shigeta, T. Yoshinaga, and M. Sowa, ”High-performance Hybrid Processor Architecture with Efficient Hardware Usability”, Proc. of International Workshop on Modern Science and Technology (IWMST 2004), September 2-3, 2004.

  70. H. Sasaki, Y. Okumura, A. Ben Abdallah, S. Shigeta, T. Yoshinaga, and M. Sowa, ”Theoretical Evaluation of Simultaneous Multi-threading Parallel Queue Processor Architecture”, Proc. International Conference on Circuits/Systems, Computers and Communications, July 2004.

  71. A. Ben Abdallah, S. Shigeta, T. Yoshinaga, and M. Sowa, ”On the Design of a Register Queue-Based Processor Architecture (FaRM-rq)”, Proc. of the International Symposium of Parallel and Distributed Processing and Applications (ISPA 2003), pp.248-262, July 2003.

  72. L. Q. Wang, A. Ben Abdallah, S. Shigeta, T. Yoshinaga, and M. Sowa, ”QJAVAC: Queue-Java Compiler Design for High Parallelism Queue Java Bytecode”, Proc. of International Technical Conference in Circuits/Systems, Computers and Communications (ITC-CSCC2003), pp. 900-903, July 2003.

  73. Tao. Q. Viet, T. Yoshinaga, A. Ben Abdallah, and M. Sowa, ”A Hybrid MPI-OpenMP Solution for a Linear System on a Cluster of SMPP”, SACSIS03, pp.299-306, 2003.

  74. T. Q. Viet, T. Yoshinaga, A. Ben Abdallah, and M. Sowa, ”A Hybrid MPI-OpenMP Solution for a Linear System on a Cluster of SMPs”, Proc. of Symposium on Advanced Computing Systems and Infrastructures, pp.299-306, 2003.

  75. A. Ben Abdallah, S. Shigeta, T. Yoshinaga, and M. Sowa, ”Complexity Analysis of a Functional Assignment Register Microprocessor”, Proc. of the Int. Workshop on Modern Science and Technology (IWMST02), pp.116-123, Sep. 2002.

  76. Kiriuka Nikolova, A. Ben Abdallah, and M. Sowa, ”Dynamical Critical Path Parallelism-Independent Scheduling Algorithm for Distributed Computing Systems”, Proc. of the International Technical Conference on Circuits and Systems, Computers and Communications, pp. 929-934, July 2001.

  77. A. Ben Abdallah, and M. Sowa, ”DRA: Dynamic Register Allocator Mechanism for FaRM Microprocessor”, Proc. of the 3rd International Workshop on Advanced Parallel Processing Technologies (APPT’99), pp.131-136, October 1999.

  78. A. Ben Abdallah, M. Sarem, and M. Sowa, ”A Survey on the advances of Disc I/O performance metrics”, Proc. of International Conference on Robotics, Vision and Parallel Processing, pp. 522-527, July 1999.

  79. L. L. Shan, L. Liu, and A. Ben Abdallah, ”The Master-Slave Two Level Distributed Microcomputer Measuring and Monitoring System”, ISMTIT, Japan, pp. 161-164, 1996

Domestic Conference Papers

  1. Ryunosuke Murakami, Yuichi Okuyama, Abderazek Ben Abdallah, 'Animal Recognition and Identification with Deep Convolutional Neural Networks for Farm Monitoring', Information Processing Society Tohoku Branch Conference, Koriyama, Japan, Feb. 10, 2018.

  2. Yuji Murakami, Yuichi Okuyama, Abderazek Ben Abdallah, 'SRAM Based Neural Network System for Traffic-Light Recognition in Autonomous Vehicles', Information Processing Society Tohoku Branch Conference, Koriyama, Japan, Feb. 10, 2018.

  3. Kanta Suzuki, Yuichi Okuyama, Abderazek Ben Abdallah, 'Hardware Design of a Leaky Integrate and Fire Neuron Core Towards the Design of a Low-power Neuro-inspired Spike-based Multicore SoC', Information Processing Society Tohoku Branch Conference, Koriyama, Japan, Feb. 10, 2018.

  4. A. Ben Abdallah, T. Yoshinaga, and M. Sowa, 'Rapid FPGA Prototyping of a Queue Processor Core for Embedded Computing', Proc. of 67th Conf. of Information Processing Society of Japan, March 2~4, 2005.

  5. A. Ben Abdallah, M. Arsenji, K. Kiuchi, M. Akanda, S. Shigeta, T. Yoshinaga, and M. Sowa, 'PQPpfB: Parallel Queue Processor Architecture in Verilog-HDL', Proc. of 66th Information Processing Society of Japan, pp. 3F-4, March 2004.

  6. T. Viet, T. Toshinga, A. Ben Abdallah, and M. Sowa, 'Optimization for Hybrid MPI-OpenMP Programs on a Cluster of SMPs', SACSIS 2004.

  7. A. Musfiquzzaman, A. Ben Abdallah, S. Shigeta, T. Yoshinaga, and M. Sowa, 'Queue Computation Mechanism For Parallel Execution in Parallel Queue Processor', Proc. of Information Processing Society of Japan, Vol. 60, pp. 3F-4, 2004.

  8. A. Ben Abdallah, S. Shigeta, T. Yoshinaga, and M. Sowa, 'Reduced Bit-Width Instruction Set Architecture for Q-mode Execution in Hybrid Processor Architecture (FaRM-rq)', Proc. of Information Processing Society of Japan, pp. 19-23, June 2003.

  9. L. Wang, A. Ben Abdallah, S. Shigeta, T. Yoshinaga, and M. Sowa, 'Fast, Effective Instruction Generation Algorithm For Queue-Java Compiler (QJAVAC)', Proc. of Information Processing Society of Japan, Vol.2003, No.40, pp.55-60, 2003.

  10. L. Wang, A. Ben Abdallah, S. Shigeta, T. Yoshinaga, and M. Sowa, 'An Ambiguous Context-Free Grammar for Deterministic Parsing In Queue-Java Compiler', Proc. of Information Processing Society of Japan, Vol.2003, No.62, pp.7-12, 2003.

  11. L. Wang, A. Ben Abdallah, S. Shigeta, T. Yoshinaga, and M. Sowa, 'QJAVAC: Queue-Java Compiler Design for High Parallelism Queue Java', Proc. of IIEICE Technical Conference, 2003.

  12. A. Ben Abdallah, K. Nikolova T. Yoshinaga, and M. Sowa, 'FARM QUEUE MODE: On a Practical Queue Execution Model (QEM)', TIWSS’01, October 2001.

  13. A. Ben Abdallah, K. Nikolova, and M. Sowa, 'FARM-Queue Execution Model: Towards an Alternative Computing Paradigm', Proc. of IPSJ Symposium, Yokohama pp.99-100, March 2000.

  14. A. Ben Abdallah, M. Sarem., and M. Sowa, 'Acyclic DFG on a Queue Machine', Proc. of JSPP, Tokyo, pp.119-120, 2000.

  15. A. Ben Abdallah, and M. Sarem, 'Instruction Scheduling System for Superscalar Processor', JSPP, Tokyo, pp.161, Apr. 2000.

Technical Reports

  1. Achraf Ben Ahmed, PHENIC Design-Flow Poster, Technical Report, Adaptive Systems Laboratory, Aizu University, January 18, 2016.

  2. Achraf Ben Ahmed, Introduction to Network Simulation with OMNET++ A Case of PhoenixSim, Technical Report, Adaptive Systems Laboratory, Aizu University, June 1, 2016.

  3. Akram Ben Ahmed et al., ''OASIS 3D Fault Tolerant Router Hardware Physical Design with TSVs'', Technical Report, Adaptive Systems Laboratory, Aizu University, May 28, 2015.

  4. Akram Ben Ahmed, OASIS 3D-Router Hardware Physical Design, Technical Report, Adaptive Systems Laboratory, Aizu University, July 8, 2014.

  5. Ben Ahmed Akram, A. Ben Abdallah, On the Design of a 3D Network-on-Chip for Many-core SoC, Technical Report, Adaptive Systems Laboratory, Aizu University, Feb. 2012.

  6. A. Ben Abdallah, PHENIC: Silicon Photonic 3D-Network-on-Chip Architecture for High-performance Heterogeneous Many-core System-on-Chip, Technical Report, Adaptive Systems Laboratory, Aizu University, September 1, 2013.

  7. H. Hoshino, QSoC: Implementation of a simple Queue SoC on FPGA, Technical Report, Adaptive Systems Laboratory, Aizu University, Jan. 2009.

  8. Yumiko Kimezawa, BANSMOM Technical Report, Technical Report, Adaptive Systems Laboratory, Aizu University, 2010.

  9. T. Omoto, Qasm - User Friendly Assembler for Queue Computers, Technical Report, Adaptive Systems Laboratory, 2010.

  10. H. Hoshino, Multi-Queue core System on a Chip (MQSoC), Technical Report, Adaptive Systems Laboratory, Queue Group, Aizu University, 2010.

  11. H. Hoshino, QC-2 Data Path, Technical Report, Adaptive Systems Laboratory, Aizu University, Oct. 2009.

  12. Abderazek Ben Abdallah, QueueCore - The Strong Wave!, Technical report, Network Computing Laboratory, University of Electro-Communications, Tokyo, May 2007.

  13. Abderazek Ben Abdallah, Verilog HDL Quick Guide, Parallel/Distributed Systems Laboratory, Graduate School of Information Systems, University of Electro-Communications, Tokyo, 2004.

  14. Abderazek Ben Abdallah, QueueCore Instruction Set Architecture, Technical Report, Parallel/Distributed Systems Laboratory, Graduate School of Information Systems, University of Electro-Communications, Tokyo, January 2003.

  15. Abderazek Ben Abdallah, QC-1 Processing Stages Algorithms, Technical Report, Parallel/Distributed Systems Laboratory, Graduate School of Information Systems, University of Electro-Communications, Tokyo, 2003.

Selected Publications in Circuits & Systems

  1. Abderazek Ben Abdallah (Author), Khanh N. Dang (Author), ''Neuromorphic Computing Principles and Organization’’, 2nd Edition, Publisher: Springer; 2025. Link: https://link.springer.com/book/9783031830884, Publication date: Q1, 2025, ISBN-10: 3031830881, ISBN-13: 978 3031830884

  2. N. -D. Nguyen, K. N. Dang, A. B. Ahmed, A. Ben Abdallah and X. -T. Tran, "NOMA: A Novel Reliability Improvement Methodology for 3-D IC-based Neuromorphic Systems,” IEEE Transactions on Components, Packaging and Manufacturing Technology, doi: 10.1109/TCPMT.2024.3488113.

  3. N. -D. Nguyen, A. B. Ahmed, A. Ben Abdallah, and K. N. Dang, "Power-Aware Neuromorphic Architecture with Partial Voltage Scaling 3-D Stacking Synaptic Memory," in IEEE Transactions on Very Large-Scale Integration (VLSI) Systems, vol. 31, no. 12, pp. 2016-2029, Dec. 2023, doi: 10.1109/TVLSI.2023.3318231.

  4. W. Y. Yerima, K. N. Dang and A. B. Abdallah, "R-MaS3N: Robust Mapping of Spiking Neural Networks to 3D-NoC Based Neuromorphic Systems for Enhanced Reliability,” IEEE Access, vol. 11, pp. 94664-94678, 2023.

  5. K. N. Dang, N. A. V. Doan and A. Ben Abdallah, "MigSpike: A Migration Based Algorithms and Architecture for Scalable Robust Neuromorphic Systems,” IEEE Transactions on Emerging Topics in Computing, vol. 10, no. 2, pp. 602 617, 1 April-June 2022, doi: 10.1109/TETC.2021.3136028.

  6. Abderazek Ben Abdallah, Khanh N. Dang, “Toward Robust Cognitive 3D Brain-inspired Cross-paradigm System,'' Frontiers in Neurosciences 15:690208, doi: 10.3389/fnins.2021.690208.

  7. K. N. Dang, A. B. Ahmed, A. B. Abdallah and X. -T. Tran, "HotCluster: A Thermal-Aware Defect Recovery Method for Through-Silicon-Vias Toward Reliable 3-D ICs Systems,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 41, no. 4, pp. 799-812, April 2022, doi: 10.1109/TCAD.2021.3069370.

  8. A. B. Ahmed, T. Yoshinaga and A. Ben Abdallah, "Scalable Photonic Networks-on-Chip Architecture Based on a Novel Wavelength-Shifting Mechanism," IEEE Transactions on Emerging Topics in Computing, vol. 8, no. 2, pp. 533-544, 1 April-June 2020, doi: 10.1109/TETC.2017.2737016.

  9. The H. Vu,Yuichi Okuyama, Abderazek Ben Abdallah, “Comprehensive Analytic Performance Assessment and K-means based Multicast Routing Algorithms and Architecture for 3D-NoC of Spiking Neurons,” ACM Journal on Emerging Technologies in Computing Systems (JETC), Vol. 15, No. 4, Article 34, October 2019. doi: 10.1145/3340963.

  10. Abderazek Ben Abdallah, A. Canedo, T. Yoshinaga, M. Sowa, “The QC-2 Parallel Queue Processor Architecture,” Journal of Parallel and Distributed Computing, Vol. 68, No. 2, pp. 235-245, 2008.