Next: Computer Industry Laboratory Up: Department of Computer Previous: Multimedia Devices Laboratory

Computer Education Laboratory


/ A. R. Taubin / Professor

The Computer Education Laboratory is participating in research on theoretical and applied problems of asynchronous and concurrent systems design.

The future growth of digital systems is made possible only by the development of sophisticated CAD tools. This requires the development of new efficient methods, especially essential for relatively new fields of asynchronous design and deep submicron technology (DSM).

The asynchronous and concurrent design is required an extensive formal methods and DA support that has been lacking up to now.

Development of DA is also of importance for training both engineers and students.

The basic apparatus for the asynchronous circuit study and design is a behavior model as far as semantically asynchronous properties can be defined in terms of behavior: through the causal relations between the switchings of the elements.

Formal models of concurrency especially Petri nets (PN) and Signal Transition Graphs (STG) as interpreted Petri nets are widely used for specification and design of asynchronous control circuits.

The technology of interest for research targeting at 10-15 years ahead is the one which is less than 100 nm. (deep submicron or DSM). It is now almost a common place to point out that for DSM noise immunity is becoming a metric of compatible importance to area, timing and power.

The results of 1997 year laid the theoretical and practical basis to the development of model transformation and behavior-improving methods for the Low noise asynchronous design.

Topics and Contents

  1. Noise problems in deep submicron and asynchronous circuits
  2. Crosstalk sensitivity (temporal and spatial adjacency), conditions of transient and delay faults,
  3. Noise insensitivity, concurrency of signals and observability don't cares (ODC),
  4. Analysis approach - isolated (insensitive) pairs extraction and constraining layout synthesis to avoid crosstalk
  5. Synthesis approach - increase "switching isolation" by:
  6. Hierarchical approach (clustering): macros and long wires



Next: Computer Industry Laboratory Up: Department of Computer Previous: Multimedia Devices Laboratory


www@u-aizu.ac.jp
August 2000