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Computer Devices Laboratory


/ Kazuyuki Saito / Professor
/ Kenichi Kuroda / Professor
/ Yasuhiro Hisada / Assistant Professor

The Computer Device Laboratory, the CDL, focuses on education and research on VLSI technology, devices, and their related area. The main activities are as follows:

  1. Education:

  2. Research: The main objective of the research in the CDL is to develop a new environment for VLSI design and diagnoses. That will be an intelligent manufacturing system for VLSIs including a statistical representation, a topographic representation, and an expert system representation of VLSI design and diagnoses. And the objects of representation are not restricted in the devices and processing technologies, but will cover from the manufacturing system modeling to the reliability of VLSI. The research projects being performed in the CDL are as follows:

Prof. Kazuyuki Saito: In these ten years, his research interest is going toward the computer integrated manufacturing system. His understanding of CIM is the Centralized Information Manufacturing. On this concept, he developed a novel VLSI yield modeling applying to the Yield Enhancement, a novel Topography Simulator, a Factory Modeling using Queuing System, a Local Area Network in the VLSI Factory and its Application on the Quality Enhancement of VLSI production. He is now developing a Production Scheduling System with a novel algorithm.

Prof. Kenichi Kuroda: Before joining this university, he has been engaged with the x-ray lithography project using a synchrotron radiation source at NTT. He keeps his interest in design of X-ray mirror system which is expected to be used for X-ray lithography in future ULSI production. He has been developing a useful optimizing tool for the mirror system design. After joining the CDL, he is also interested in the multiple-valued logic devices such as neuron MOS, quantum devices, and other devices. These devices are expected to solve the complexity crisis in future ULSI circuitry.

Prof. Yasuhiro Hisada: His interest is computer simulation of semiconductor crystal growth process. The quality and yield of LSI is influenced quality of semiconductor crystal. He is also interested in biometrics. Now, he has been developed measurement and analysis system of a living body signal. This research is related to research of LSI for signal processing and analog circuit and sensor. In addition, this research will become the base of ultimate interface between computer and human.


Refereed Journal Papers

  1. Kazuhira Maehara, Hiromichi Hashimoto, Osamu Nemoto, Kenichi Kamei, Reiko Matsuoka, Yoshio Shimizu, Yasuhiro Hisada, Yukio Maruyama., Abnormal high-frequency components in the QRS complex detected by the wavelet transform in Dahl salt-sensitive hypertensive rats. Jpn. J. Electrocardiology, vol.20, No.1, pp.11--19, 2000.

    Although ventriclus-sinister hypertrophy has the relation with the ventricular arrhythmias, the pathosis of the excitation conduction impairment which is considered to be the cause of arrhythmias is not clear. The wavelet analysis of QRS complex was performed using the Dahl salt-sensitivity hypertensive rats which are the model of the hypertensive hypercardia. The effect of the $\beta$ acceptor stimulus to the development of the conduction impairment and the conduction impairment which were caused by the ventriclus-sinister hypertrophy was examined. Tail blood-pressure measurement, the echocardiography and the body surface side electrocardiography were performed at the time of 6 week age (before high salt foods start), and 16 week age. The number of wavelet transform wave peaks and duration of the vector magnitude of body surface side QRS complex increased significantly by the enlargement of the systolic pressure and the thickness of ventriclus-sinister wall. These wavelet analysis parameters and the weight of the heart had the positive correlation. The excitation conduction impairment increases by the progress of ventriclus-sinister hypertrophy, and the arrhythmic substrate may be formed. Moreover, a likelihood that the effect of a $\beta$ stimulus would decrease was suggested.

  2. Kazuyuki SAITO, Sumika ARIMA, Toshio YOKOYAMA, and Haruo YAMANAKA. Application of a Resource Planning System for a VLSI Assembly Facility. 1999 IEEE International Symposium on Semiconductor Manufacturing, 1999.

    This paper cocerns a resource lanning system for a VLSI assembly facility. The algorithm used for planning is based on the M/M/m queuing model with an incoming buffer, and two kinds of resources, (the number of machines and the number of operators), are considered simultaneously. This planning system has been examined in an actual facility for 5 months and was evalated to have enough accuracy and a very short calculation time for real application in planning machinery resources and turnaround time.

Refereed Proceeding Papers

  1. O. Hammami, K. Kuroda, Q. Zhao, and K. Saito., Coevolvable Hardware Platform for Automatic Hardware Design of Neural Networks. Proc. IEEE Int. Conf. on Industrial Technology 2000, pp.509-514, 1999.

    This paper proposes a system for the automatic hardware design of neural networks based on cooperative coevolutioinary paradigms and multiple reconfigurable devices. Our system is composed of logic synthesis tool, multiple preconfigurable devices and an embedded processor executing the coevolutionary algorithm. The partitioning of the engineering design process follows current practices in hardware/software codesign based on both information on arrival rate $\lambda$ of requests and the service time $\mu$ of the reconfigurable devices. The system is suitable under some conditions for industrial applications as a reactive system but also because it can be connected to multiple systems in a totally networked industrial environment which allows download of the same hardware configuration on multiple on line devices.

Books

  1. Kazuyuki SAITO., Principles of VLSI Process/Device Design. The University of Aizu, 1999.

Unrefereed Papers

  1. Sumika ARIMA and Kazuyuki SAITO. An Advanced Petri net for the Manufacturing System. The Society of Instrument and Control Engineers, 183 Tohoku Research Meeting, No.183-8, 1999.

  2. Sumika ARIMA and Kazuyuki SAITO. Petri net Modeling and Simulation of a manufacturing system. 1999 Joint Meeting on Electric Engineering and related field, Tohoku, No.1B14, 1999.

  3. Sumika ARIMA and Kazuyuki SAITO. Application of a Resource Planning System for a VLSI Assembly Facility. Tohoku Research Meeting of the Information Processing Society of Japan, No. TSF-99-11, 2000.

  4. Y. Okuyama, K. Kuroda, O. Hammami, Q. Zhao, and K. Saito., GA Computation Acceleration by the combination of PC and FPGA through PCI BUS Interface. Proc. 3rd BIWAKO Workshop on System LSI, pp.179-181, 1999.

  5. T. Kanno, K. Kuroda, O. Hammami, Q. Zhao, and K. Saito., Design of Cluster-type Evolvable Hardware. Proc. 3rd BIWAKO Workshop on System LSI, pp.175-177, 1999.

Grants

  1. Kazuyuki Saito, Qiangfu Zhao, Ommar Hammami, and Kenichi Kuroda., Ministry of Education Scientific Research Fund. Cooperative co-evolutionary hardware and its application. Basic Research (C), No.10650375.

  2. Kazuyuki Saito, Kenichi Kuroda, and Yasuhiro Hisada., The University of Aizu Organization for the Advancement of Scientific Research Fund. Joint Research with Tohoku Electronics of Fujitsu, 1999.

  3. Kazuyuki Saito, Kenichi Kuroda, and Yasuhiro Hisada., A new approach for logic circuit design. The University of Aizu Organization for the Advancement of Scientific Research Fund. Joint Research with Tohoku Electronics of Fujitsu, 1999.

  4. Kazuyuki Saito., The University of Aizu Organization for the Advancement of Scientific Research, NTT Fund. Joint Research with NTT, 1999.

  5. Kazuyuki Saito, Qiangfu Zhao, Ommar Hammami, and Kenichi Kuroda., Cooperative co-evolutionary hardware and its application. Ministry of Education Scientific Research Fund, Synthesis Research (C), Engineering, No.10650375.

Academic Activities

  1. Kazuyuki Saito., Secretary of the Association of Japan Advancement of Electronics Industry and the Design Committee of Computer Supporting Electronic Materials.

  2. Kenichi Kuroda., Secretary of the IEICE Tohoku Branch, manager of Student Activity Committee. March 1999.

  3. Kenichi Kuroda., Secretary of the PARTHENON Society, Steering Committee, 1999.

Others

  1. Sumika ARIMA., Development of a Petri Net Tool for the Analysis of Manufacturing Systems. Master Thesis for the Univ. of Aizu, 2000. Thesis Adviser: Kazuyuki Saito.

  2. Tomoko Kanno., Master Thesis: Circuit Design for Evolutionary Pattern Recognition System. The Univ. of Aizu, 2000, Thesis Adviser: Kenichi Kuroda.

  3. Koji Ogaki., Graduation Thesis: Development of a Maze Explorer Robot. 1999, Thesis Adviser: Kenichi Kuroda.

  4. Hidekazu Kishimoto., Graduation Thesis: Layout and Process Design of a C-MOS Full-adder Circuit. 1999, Thesis Adviser: Kenichi Kuroda.

  5. Seiichiro Imabayashi., Graduation Thesis: Design of PCI Device Driver Interface and Software Emulator for Pattern Recognition System. 1999, Thesis Adviser: Kenichi Kuroda.

  6. Keigo Kinbara., Graduation Thesis: Design of SRAM Controller and Fitness Evaluation Circuits for Pattern Recognition System. 1999, Thesis Adviser: Kenichi Kuroda.

  7. Kenji Ishihara., Graduation Thesis: Design of PCI Interface Curcuits for Pattern Recognition System. 1999, Thesis Adviser: Kenichi Kuroda.



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November 2000