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- Victor I. Varshavsky,
- Professor, Computer Logical Design Laboratory
We are studying:
- the optimization strategy for resource sharing in massively parallel
and distributed systems, trying to attain the global maximum in computer
performance with limited resources, such as common memory, channels, etc.
- using data-controlled incorporated delays for producing the signals of
transient process completion in the cases when the variations of transient
process duration are determined by the sets of input signal values.
- the design of a speed-independent communication channel based on a
pipeline token-ring architecture including channel organization, protocol
and syntax-driven implementation of the channel protocol controller.