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Computer Devices Laboratory


/ Kazuyuki Saito / Professor
/ Yasuhiro Hisada / Assistant Professor

This laboratory has focused on education and research on the physics of semiconductor devices, and an associated technology.

One of the members of this laboratory, Dr. K.Saito, comes from NTT LSI Laboratories, where he performed research on MOS Devices, and MOS process technologies from the beginning of VLSI era, and also supervised a research project for VLSI quality and production management.

His current interests are education in semiconductor technology at the University, research on the reliability of semiconductor devices and data management systems in LSI fabrication, new materials for novel devices, neural networks and circuits, and psy energy.

As for education, he has been studying in the research group on "Study to improve the VLSI Education System in the University" sponsored by the Scientific Foundation in Japan. Also, he has made great efforts to establish a research group on reliability problems, data management, and simulation for current VLSI technology. Physics concerning reliability and data management for quality control are very important subjects for the student who will be an engineer.

There still remains a big reliability problem in the sub-half-micron MOS devices concerning impact ionization and hot carriers generation in the drain region of MOSFET, and also in the metallization system concerning electro- or stress-migration. Although LDDMOSFET, which was invented by Dr. Saito, is effective in improving the reliability of MOSFET and is used in 0.5 micron technology as a standard device, the application of it in a quarter-micron will be difficult because of its parasitic effect originally included in the structure. Still we do not have any new devices which surpass LDDMOSFET, and our continuous effort is required to invent a new electronic device for the next generation. This laboratory is now establishing a measurement system to study and teach the MOS device reliability problem.

Data management and simulation of VLSI technology are needed in high quality controlled fabrication systems and in the efficient design of the sub-half-micron VLSI. The simulation system is also useful in the teaching of VLSI technology. Prof. Saito plans to introduce a VLSI topography simulation system with an LSI-CAD interface, which is one of the most advanced tools to see a cross-sectional view in any place desired and can simulate any methods being used presently in the VLSI fabrication system.

New technologies will be required both in material and in circuit technologies, because the current VLSI technology is coming to its limit stage and must be broken through. Prof. Saito and Dr. Iizuka in the Computer Solid State Physics Laboratory proposed research on "New Diamonds". Their plan to establishing a facility for devices and materials research is under discussion. Neural networks and its circuit is one of the technologies which may be able to break through the limit.

Another member of this laboratory, Dr. Y. Hisada, is from Toyohashi University of Technology. He is an expert in simulation technology, measurement and control, and electrical circuit technology. He has an interest in crystal growth under micro-gravity conditions, which he studied for his doctoral thesis. Also he organized a research project on Psi Energy as an extracurricular project (SCCP) program, with Dr. K. Saito, and Mr. K. Nakazawa in the Center for Cultural Research and Studies. He is now preparing a measurement system of the signals from a human body.

Dr. K. Saito will teach "Semiconductor Theory", "Micro-electronics", and "VLSI Design", and Dr. Y. Hisada will teach in the lab-session of these courses.

Refereed Journal Papers


  1. Y. Hisada, O. Saito, K. Mitachi, and T. Nishinaga. Computer simulation of rapid crystal growth under microgravity. Journal of The Japan Society of Microgravity Application, 10(1), 1993.

    We are planning to grow a Ge single crystal under microgravity by the TR-1A rocket in 1992. The furnace temperature should be controlled so as to finish the crystal growth in a quite short time interval (about 6 minutes). This study deals with the computer simulation of rapid crystal growth in space to find proper condition for the experiment. The crystal growth process is influenced by various physical phenomena such as heat conduction, natural and Marangoni convections, phase change and radiation from the furnace. In this study, a 2-dimensional simulation with axial symmetry is carried out, taking into account the radiation field with a specific temperature distribution of the furnace wall. The simulation program consists of four modules. The first module is applied for the calculation of the parabolic partial differential equation by using the control volume method. The second one evaluates implicitly the phase change by the enthalpy method. The third one is for computing the heat flux from surface by radiation. The last one is for calculating with Monte Carlo method the view factors which are necessary to get the heat flux.


  2. T. Nishinaga, Y. Okamoto, S. Yoda, T. Nakamura, O. Saito, Y. Hisada, H. Ando, and S. Anzawa. Rapid melt growth of ge by tr-ia sounding rocket. Journal of The Japan Society of Microgravity Application, 10(4):212-220, 1993.

    Rapid melt growth of Ge was conducted by using NASDA(National Space Development Agency of Japan) TR-IA sounding rocket. To understand the growth, the computer simulation was carried out and it was found that the shape of the solid-liquid interface will take at first a strong convex shape to the melt. However, the interface during the growth will be quickly recovered to have a nearly flat surface. A single crystal was grown with the velocity of/min which was measured in-situ by CCD camera. The longitudinal cross section of the space grown sample showed the melted and unmelted interface was strongly convex to the melt which agrees with the computer simulation. The dislocation density in the regrown crystal was and this was explained by assuming the presence of strong stress due to the sticking between the melt and the quartz wall.


  3. T. Abe, S. Tazawa, and K. Saito. Optimization of via-hole shape using quasi 3-D topography simulation. Trans. of IEICE, J76-C-II, 1993.

    Quasi-3D Topography Simulator which can quickly calculate cross-sectional shape of a via-hole considering with 3-D shadowing effect has been developed. Using this simulator an optimization method of via-hole shape and processing condition was proposed. Using this method, an optimum via-hole shape, upper part of side wall was perpendicular to the wafer surface and lower part of it has taper, we derived. Moreover, as a processing condition of this via-hole, three-step RIE method in which etching rates of resist and insulator were well controlled by gas flow was derived.

Refereed Proceeding Papers


  1. F.A. Leon, S. Tazawa, K. Saito, A. Yoshii, and D.L. Scharfetter. Numerical algorithms for precise calculation of surface movement in 3-D topography simulation. In Proceeding 1993 International Workshop on VLSI Process and Device Modeling (1993 VPAD), 1993.

    As topography simulation becomes increasingly important for ULSI technology development, the numerical algorithms for movement of the surface during etch, deposition and oxidation simulation require deeper examination. In this paper, two new fundamental algorithms for 3-D surface movement are presented. First, the ``characteristic wavefront'' method provides highly accurate 3-D vertex movement for vertices with an arbitrary number of adjacent planes, especially for the different case of sputter etch. The second algorithm, the ``swept solid'' method, treats the problem resulting from a growing or etching surface colliding with itself. The algorithm reported here treats the technologically important case of simultaneous etch and deposition. These two methods have been implemented in the 3-D topography simulation program THUNDERBIRD.

Unrefereed Papers


  1. T. Nishinaga, Y. Okamoto, S. Yoda, T. Nakamura, O. Saito, Y. Hisada, H. Ando, and S. Anzawa. Rapid melt grown of ge by tr-ia rocket - characterization of growth crystal -. In JASMAC-9, Oct. 1993.

Others


  1. T. Nanya, K. Saito, and et al. Research for improvement in the education of VLSI system design in the university.

    Grant for Scientific Research by the Ministry of Education, Science and Culture. Research for improvement in the education of VLSI system design in the university was proposed cooperatively with professor T. Nanya, the Tokyo institute of technology.



Next: Computer Logical Design Up: Department of Computer Previous: Computer Solid State


a-fujitu@edumng1.u-aizu.ac.jp
Fri Feb 10 09:19:38 JST 1995